From Sand to Silicon “Making of a Chip” Illustrations May 2009



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Metal Deposition
After Electroplating –
scale: transistor level (
50-200nm)

On the wafer surface the copper ions settle as a thin layer of copper.
Electroplating –
scale: transistor level (
50-200nm)

The wafers are put into a copper sulphate solution as this stage. The copper ions are deposited onto the transistor thru a process called electroplating. The copper ions travel from the positive terminal anode) to the negative terminal (cathode) which is represented by the wafer.
Ready Transistor –
scale: transistor level (
50-200nm)

This transistor is close to being finished. Three holes have been etched into the insulation layer (magenta color) above the transistor. These three holes will be filled with copper which will makeup the connections to other transistors.

Copyright © 2009, Intel Corporation. All rights reserved. Intel, Intel logo and Intel Core are trademarks of Intel Corporation in the US. and other countries.
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Metal Layers
Polishing –
scale: transistor level (
50-200nm)

The excess material is polished off.
Metal Layers – scale transistor level (six transistors combined
500nm)

Multiple metal layers are created to interconnect (think wires) in between the various transistors. How these connections have to be wired is determined by the architecture and design teams that develop the functionality of the respective processor (e.g. Intel Core i Processor ). While computer chips look extremely flat, they may actually have over 20 layers to form complex circuitry. If you look at a magnified view of a chip, you will see an intricate network of circuit lines and transistors that look like a futuristic, multilayered highway system.

Copyright © 2009, Intel Corporation. All rights reserved. Intel, Intel logo and Intel Core are trademarks of Intel Corporation in the US. and other countries.
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