Diode Logic Design Pengzhong Chen



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Lab 2:
Diode Logic Design
Pengzhong Chen

Thai Le
15/09/2014

ENGR-307L: Semiconductor Electronics I

Introduction´╝Ü

The aim of this lab is develop an understanding of using PN junction to design practical digital gates. OR and AND logic gates will be constructed by using PN junction diodes. Logic gates OR and AND both have two inputs. For an AND logic gate, the truth table is presented in Table 1.

A

B

Output

0

0

0

0

1

0

1

0

0

1

1

1

Table 1

The truth table for OR gate is presented in Table 2.



A

B

Output

0

0

0

0

1

1

1

0

1

1

1

1

Table 2

As the Graph 1 shows, the current will be permitted when the anode is connecting to the positive voltage and the cathode is connecting to the negative voltage. The current will not be permitted when the anode is connecting to the negative voltage and the cathode is connecting to the positive voltage. This is a very special property makes it possible to construct practical logic gates with diodes. macintosh hd:users:robin:downloads:03247.png

Graph 1

The Graph 2 shows the structure for diode OR gate, and the Graph 3 shows the structure for diode AND gate. All in all, the lab will be performed by building the OR gate and AND gates with diodes and resistors based on graph 2 and graph 3.



macintosh hd:users:robin:downloads:dior.gifmacintosh hd:users:robin:downloads:diand.gif

Graph 2 Graph 3



Materials and Methods

The equipment and materials involved in this lab are list as follows:





Circuit Elements

Two Silicon Diodes Resistor (1K ohms)

Measuring Instruments and Power source

Digital Multimeter

Physical Implementation

Cadet Board

Computer simulation software

None

As we explained in the introduction part, the aim of this lab was to construct practical logic gates using diodes. All the circuit diagrams that needed to be implement on the Cadet board were presented in the introduction part. For the logic AND gate implementation, two silicon diodes and a 1K resistor were needed. After placed the circuits elements on the board, we connected the A and B port to the logic input on the Cadet board as well as wiring the output from the circuit to the output indicator located on the right side of the Cadet board. Then, we turned on the Cadet board and connect the resistor to the power on the Cadet board, which is 5V. We tested all the four different combinations of the inputs and record the results.

The second part of the lab was to build an OR gate with the silicon diode. The similar approach was taken for this part. We follow the circuit presented in the introduction part and used two diodes and one resistor, and the resistor was connected to the ground. All the possible inputs were tested and we took all the pictures for all the results. The pictures will be presented in the result part. Those will not only show the inputs and outputs result, but also will also show how the circuits are implemented.

Results:


After building the circuit on the Cadet board, logic inputs buttons and logic output indicator were being used to test the circuit. All the four possible combinations for logic AND gate were implemented. All the logic inputs and outputs matched the table 1 presented on the Introduction part.

The Graph 4 is for both inputs low through the AND gate and the output indicator indicates the result is low. The Graph 5 is for input A is high and input B is low, and the output indicator indicates the result is low. The Graph 6 is input A is low and input B is high, and the output indicator indicates the result is low. The Graph 7 is input A and input B are both high, the output indicator indicates the result is high. These results match with the truth table.



The same procedure was carried out for constructing OR gate. The Graph 8 is input A and input B are both low, the output indicator indicates the result is low. The Graph 9 is input A is high and input B is low, the output indicator indicates the result is high. The Graph 10 is input B is high and input A is low, the output indicator indicates the result is high. The Graph 11 is input A and B are high, the output indicator indicates the result is high. These results match with the truth table.

.


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